#define CLKP BIT6 /* P1.6 */
#define CLKN BIT7 /* P1.7 */
-static unsigned long next = 0;
-static void my_srand(unsigned long seed)
+static uint16_t prng_state = 0xACE1u;
+static void my_srand(uint16_t seed)
{
- next = seed;
+ prng_state = seed;
}
-static unsigned int
+static uint16_t
my_rand()
{
- next = next * 1103515245 + 12345;
- return (unsigned int)next;
+ unsigned lsb = prng_state & 1;
+ prng_state >>= 1;
+ if (lsb == 1)
+ prng_state ^= 0xB400u;
+ return prng_state;
}
static void
WDTCTL = WDTPW + WDTHOLD;
/* external 32.768kHz crystal */
- BCSCTL1 |= DIVA_3; /* ACLK/8 */
+ BCSCTL1 |= DIVA_3; /* ACLK/8: 4096 clock interrupts per second */
BCSCTL3 |= XCAP_3; /* enable 12.5pF internal capacitance */
- srand(2);
- my_srand(0xdeadbeef);
+ my_srand(0xACE1u); /* FIX ME: get a physically derived seed */
setup();
/* enable global interrupts */