projects / vetinari_clock / shortlog
| 2014-12-12 | Pat Thoyts | Corrected diode layout by using symbol with correct... | commit | commitdiff | tree | snapshot |
| 2014-12-12 | Pat Thoyts | Good board layout (fixed net by manually editing netlist). | commit | commitdiff | tree | snapshot |
| 2014-12-11 | Pat Thoyts | Fix MSP430G2x11 symbol naming. | commit | commitdiff | tree | snapshot |
| 2014-12-07 | Pat Thoyts | Working version. | commit | commitdiff | tree | snapshot |
| 2014-12-07 | Pat Thoyts | Ignore the gEDA generated temporary and backup files. | commit | commitdiff | tree | snapshot |
| 2014-12-06 | Pat Thoyts | Added gschem schematic with a stripboard pcb layout... | commit | commitdiff | tree | snapshot |
| 2014-12-06 | Pat Thoyts | Moved clock coil control pins to P1.6 and P1.7 and... | commit | commitdiff | tree | snapshot |
| 2014-12-06 | Pat Thoyts | Implemented irregular ticks. | commit | commitdiff | tree | snapshot |
| 2014-12-04 | Pat Thoyts | Blink LED using watch crystal driven interrupts at... | commit | commitdiff | tree | snapshot |